On March 18th, 2013 GoodAndEvo.net did a article about a kernel I released. This kernel was a 1.72GHz kernel, but every kernel tuner and even sysfs would report it was a 3GHz kernel. I also posted here on this site, where everyone could see it, how to obtain the correct frequencies and how to ensure your PLL tables were in fact correct. This information was also posted at goodandevo.net, so most everyone had access on how to fix their broken kernels. Please note that Marth 18th is when this information webt public, but the correct PLL tables and multipliers have been in my kernels since day one, even the open source kernels I posted on XDA.
For the hell of it, I did look at several kerne source repos for both htc and samsung devices for kernels posted on XDA, and every source repo I looked at had atleast one error in their tables (CPU and/or GPU). (I looked at over 20 kernels, some from well known “developers” such as faux, showp1984, and even cm)
Then came the idea of underclocking msm8960 devices to 192mhz. Almost every developer use the 384MHz multipliers, so while their kernels reported they were running at 192, in reality, they were running at 384MHz.
After I personally pointed this out to a few developers (and told them how to get the correct settings), these other developers adjusted pll8 from 384 to 192, not knowing this also impacted the speed of several other clocks that relied on pll8. Even after I pointed this out, other developers insisted they were right. (GREP for pll8 in a kernel source repo, and see just what relies on pll8, when you reduce pll8 from 384 to 192, you are reducing the base speed of every clock that relies on this base clock – including some GPU clocks)
Now – months later, one specific developer is looking at a ton of repos, including CM and team hydra’s repo, as well as a few others making comments related to these pll / multipliers, acting as if he is the one who knows all, acting as if he is the one who found this fix, yet this one specific developer had errors in their tables prior to the article posted at GoodAndEvo.net, and a few even after the article was posted.
I find it truly amazing that other developers will come up with a fix, long after I did, and make others believe that this fix was their fix, and they had it before anyone else. This same developer “invented” a few features MONTHS after I did, and claimed them as his own original work as well. These “features” were commited to this other developers repo after I had already left XDA, yet – while I was on XDA – some of these features were openly discussed, and tested – and the kernel containing these features was open sourced, as was every kernel I posted and supported on XDA.
Whats even more amazing is that I will release a feature here on my site, have it in your hands… and 3-4 days later – someone on XDA will “invent” the same feature and claim it as original work, and users believe these other developers, cause if it dont exist on XDA, it just dont exist at all.
below is a list of every clock that is affected by these other “developers” reducing pll8 from 384mhz to 192mhz. This reduction of pll8 seems to be the common “fix” to achieve 192MHz in 8960 based kernels. A lot of “well known” developers accepted this reduction of pll8 as “acceptable”. My kernels go as low as 162MHz, and use correct multipliers, without editing any base / core reference clocks such as pll8.
–
./clock-8960.c: F_GP( 64000000, pll8, 2, 1, 3),
./clock-8960.c: F_GP( 76800000, pll8, 1, 1, 5),
./clock-8960.c: F_GP( 96000000, pll8, 4, 0, 0),
./clock-8960.c: F_GP(128000000, pll8, 3, 0, 0),
./clock-8960.c: F_GP(192000000, pll8, 2, 0, 0),
./clock-8960.c: F_GP(384000000, pll8, 1, 0, 0),
./clock-8960.c: F_GSBI_UART( 1843200, pll8, 1, 3, 625),
./clock-8960.c: F_GSBI_UART( 3686400, pll8, 1, 6, 625),
./clock-8960.c: F_GSBI_UART( 7372800, pll8, 1, 12, 625),
./clock-8960.c: F_GSBI_UART(14745600, pll8, 1, 24, 625),
./clock-8960.c: F_GSBI_UART(16000000, pll8, 4, 1, 6),
./clock-8960.c: F_GSBI_UART(24000000, pll8, 4, 1, 4),
./clock-8960.c: F_GSBI_UART(32000000, pll8, 4, 1, 3),
./clock-8960.c: F_GSBI_UART(40000000, pll8, 1, 5, 48),
./clock-8960.c: F_GSBI_UART(46400000, pll8, 1, 29, 240),
./clock-8960.c: F_GSBI_UART(48000000, pll8, 4, 1, 2),
./clock-8960.c: F_GSBI_UART(51200000, pll8, 1, 2, 15),
./clock-8960.c: F_GSBI_UART(56000000, pll8, 1, 7, 48),
./clock-8960.c: F_GSBI_UART(58982400, pll8, 1, 96, 625),
./clock-8960.c: F_GSBI_UART(64000000, pll8, 2, 1, 3),
./clock-8960.c: F_GSBI_QUP(15060000, pll8, 1, 2, 51),
./clock-8960.c: F_GSBI_QUP(24000000, pll8, 4, 1, 4),
./clock-8960.c: F_GSBI_QUP(25600000, pll8, 1, 1, 15),
./clock-8960.c: F_GSBI_QUP(48000000, pll8, 4, 1, 2),
./clock-8960.c: F_GSBI_QUP(51200000, pll8, 1, 2, 15),
./clock-8960.c: F_PRNG(64000000, pll8),
./clock-8960.c: F_SDC( 400000, pll8, 4, 1, 240),
./clock-8960.c: F_SDC( 16000000, pll8, 4, 1, 6),
./clock-8960.c: F_SDC( 17070000, pll8, 1, 2, 45),
./clock-8960.c: F_SDC( 20210000, pll8, 1, 1, 19),
./clock-8960.c: F_SDC( 24000000, pll8, 4, 1, 4),
./clock-8960.c: F_SDC( 48000000, pll8, 4, 1, 2),
./clock-8960.c: F_SDC( 64000000, pll8, 3, 1, 2),
./clock-8960.c: F_SDC( 96000000, pll8, 4, 0, 0),
./clock-8960.c: F_SDC(192000000, pll8, 2, 0, 0),
./clock-8960.c: F_USB(60000000, pll8, 1, 5, 32),
./clock-8960.c: F_USB(60000000, pll8, 1, 5, 32),
./clock-8960.c: F_CE3( 48000000, pll8, 8),
./clock-8960.c: F_CAM( 6000000, pll8, 4, 1, 16),
./clock-8960.c: F_CAM( 8000000, pll8, 4, 1, 12),
./clock-8960.c: F_CAM( 12000000, pll8, 4, 1, 8),
./clock-8960.c: F_CAM( 16000000, pll8, 4, 1, 6),
./clock-8960.c: F_CAM( 19200000, pll8, 4, 1, 5),
./clock-8960.c: F_CAM( 24000000, pll8, 4, 1, 4),
./clock-8960.c: F_CAM( 32000000, pll8, 4, 1, 3),
./clock-8960.c: F_CAM( 48000000, pll8, 4, 1, 2),
./clock-8960.c: F_CAM( 64000000, pll8, 3, 1, 2),
./clock-8960.c: F_CAM( 96000000, pll8, 4, 0, 0),
./clock-8960.c: F_CAM(128000000, pll8, 3, 0, 0),
./clock-8960.c: F_CSI( 85330000, pll8, 1, 2, 9),
./clock-8960.c: F_CSI_PHYTIMER( 85330000, pll8, 1, 2, 9),
./clock-8960.c: F_GFX2D( 48000000, pll8, 1, 8), // pll8 = 384 384*1/8 = 48
./clock-8960.c: F_GFX2D( 54857000, pll8, 1, 7), // pll8 = 384 384*1/7 = 54.85
./clock-8960.c: F_GFX2D( 64000000, pll8, 1, 6), // pll8 = 384 384*1/6 = 64
./clock-8960.c: F_GFX2D( 76800000, pll8, 1, 5), // pll8 = 384 384*1/5 = 76.8
./clock-8960.c: F_GFX2D( 96000000, pll8, 1, 4), // pll8 = 384 384*1/4 = 96
./clock-8960.c: F_GFX2D(128000000, pll8, 1, 3), // pll8 = 384 384*1/3 = 128
./clock-8960.c: F_GFX3D( 48000000, pll8, 1, 8), //pll8 = 384, 384*1/8 = 48
./clock-8960.c: F_GFX3D( 54857000, pll8, 1, 7), //pll8 = 384, 384*1/7 = 54.85
./clock-8960.c: F_GFX3D( 64000000, pll8, 1, 6), //pll8 = 384, 384*1/6 = 64
./clock-8960.c: F_GFX3D( 76800000, pll8, 1, 5), //pll8 = 384, 384*1/5 = 76.8
./clock-8960.c: F_GFX3D( 96000000, pll8, 1, 4), //pll8 = 384, 384*1/4 = 96
./clock-8960.c: F_GFX3D(128000000, pll8, 1, 3), //pll8 = 384, 384*1/3 = 128
./clock-8960.c: F_GFX3D( 48000000, pll8, 1, 8), //pll8 = 384, 384*1/8 = 48
./clock-8960.c: F_GFX3D( 54857000, pll8, 1, 7), //pll8 = 384, 384*1/7 = 54.85
./clock-8960.c: F_GFX3D( 64000000, pll8, 1, 6), //pll8 = 384, 384*1/6 = 64
./clock-8960.c: F_GFX3D( 76800000, pll8, 1, 5), //pll8 = 384, 384*1/5 = 76.8
./clock-8960.c: F_GFX3D( 96000000, pll8, 1, 4), //pll8 = 384, 384*1/4 = 96
./clock-8960.c: F_GFX3D(128000000, pll8, 1, 3), //pll8 = 384, 384*1/3 = 128
./clock-8960.c: F_GFX3D( 48000000, pll8, 1, 8), //pll8 = 384, 384*1/8 = 48
./clock-8960.c: F_GFX3D( 54857000, pll8, 1, 7), //pll8 = 384, 384*1/7 = 54.85
./clock-8960.c: F_GFX3D( 64000000, pll8, 1, 6), //pll8 = 384, 384*1/6 = 64
./clock-8960.c: F_GFX3D( 76800000, pll8, 1, 5), //pll8 = 384, 384*1/5 = 76.8
./clock-8960.c: F_GFX3D( 96000000, pll8, 1, 4), //pll8 = 384, 384*1/4 = 96
./clock-8960.c: F_GFX3D(128000000, pll8, 1, 3), //pll8 = 384, 384*1/3 = 128
./clock-8960.c: F_VCAP( 54860000, pll8, 1, 7),
./clock-8960.c: F_VCAP( 64000000, pll8, 1, 6),
./clock-8960.c: F_VCAP( 76800000, pll8, 1, 5),
./clock-8960.c: F_VCAP(128000000, pll8, 1, 3),
./clock-8960.c: F_IJPEG( 36570000, pll8, 1, 2, 21),
./clock-8960.c: F_IJPEG( 54860000, pll8, 7, 0, 0),
./clock-8960.c: F_IJPEG( 96000000, pll8, 4, 0, 0),
./clock-8960.c: F_IJPEG(109710000, pll8, 1, 2, 7),
./clock-8960.c: F_IJPEG(128000000, pll8, 3, 0, 0),
./clock-8960.c: F_IJPEG(153600000, pll8, 1, 2, 5),
./clock-8960.c: F_JPEGD( 64000000, pll8, 6),
./clock-8960.c: F_JPEGD( 76800000, pll8, 5),
./clock-8960.c: F_JPEGD( 96000000, pll8, 4),
./clock-8960.c: F_MDP( 9600000, pll8, 1, 40),
./clock-8960.c: F_MDP( 13710000, pll8, 1, 28),
./clock-8960.c: F_MDP( 29540000, pll8, 1, 13),
./clock-8960.c: F_MDP( 34910000, pll8, 1, 11),
./clock-8960.c: F_MDP( 38400000, pll8, 1, 10),
./clock-8960.c: F_MDP( 59080000, pll8, 2, 13),
./clock-8960.c: F_MDP( 76800000, pll8, 1, 5),
./clock-8960.c: F_MDP( 85330000, pll8, 2, 9),
./clock-8960.c: F_MDP( 96000000, pll8, 1, 4),
./clock-8960.c: F_MDP(128000000, pll8, 1, 3),
./clock-8960.c: F_ROT( 29540000, pll8, 13),
./clock-8960.c: F_ROT( 32000000, pll8, 12),
./clock-8960.c: F_ROT( 38400000, pll8, 10),
./clock-8960.c: F_ROT( 48000000, pll8, 8),
./clock-8960.c: F_ROT( 54860000, pll8, 7),
./clock-8960.c: F_ROT( 64000000, pll8, 6),
./clock-8960.c: F_ROT( 76800000, pll8, 5),
./clock-8960.c: F_ROT( 96000000, pll8, 4),
./clock-8960.c: F_VCODEC( 32000000, pll8, 1, 12),
./clock-8960.c: F_VCODEC( 48000000, pll8, 1, 8),
./clock-8960.c: F_VCODEC( 54860000, pll8, 1, 7),
./clock-8960.c: F_VCODEC( 96000000, pll8, 1, 4),
./clock-8960.c: F_VPE( 34909000, pll8, 11),
./clock-8960.c: F_VPE( 38400000, pll8, 10),
./clock-8960.c: F_VPE( 64000000, pll8, 6),
./clock-8960.c: F_VPE( 76800000, pll8, 5),
./clock-8960.c: F_VPE( 96000000, pll8, 4),
./clock-8960.c: F_VFE( 13960000, pll8, 1, 2, 55),
./clock-8960.c: F_VFE( 36570000, pll8, 1, 2, 21),
./clock-8960.c: F_VFE( 38400000, pll8, 2, 1, 5),
./clock-8960.c: F_VFE( 45180000, pll8, 1, 2, 17),
./clock-8960.c: F_VFE( 48000000, pll8, 2, 1, 4),
./clock-8960.c: F_VFE( 54860000, pll8, 1, 1, 7),
./clock-8960.c: F_VFE( 64000000, pll8, 2, 1, 3),
./clock-8960.c: F_VFE( 76800000, pll8, 1, 1, 5),
./clock-8960.c: F_VFE( 96000000, pll8, 2, 1, 2),
./clock-8960.c: F_VFE(109710000, pll8, 1, 2, 7),
./clock-8960.c: F_VFE(128000000, pll8, 1, 1, 3),
./clock-8960.c: F_VFE(153600000, pll8, 1, 2, 5),